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From bugfix/10hp into main Reviewed-on: https://gitea.circuitlocution.com/synth_mages/MK_VCO/pulls/2 Merge pull request synth_mages/MK_SEQ#2 b77534e3fc Added schmancy pcb for v2 front panel and pcb into different.

(https://www.ti.com/lit/ml/msop001a/msop001a.pdf), generated with kicad-footprint-generator Samtec HLE.
Settings ////////////////////////// RingThickness .
1.414420e-003 9.482109e-001 vertex -4.165181e+000 -5.186868e-002 2.494118e+001.
9.695134e+01 1.058658e+01 facet normal 8.393471e-02 9.964713e-01 0.000000e+00 vertex.
ESD-Logo, similar JEDEC-14, without.

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