Labels Milestones
BackStrip, HLE-106-02-xx-DV-TE, 6 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator connector TE MATE-N-LOK top entry JST PUD series connector, S11B-XASK-1 (http://www.jst-mfg.com/product/pdf/eng/eXA1.pdf), generated with kicad-footprint-generator Molex Mini-Fit Jr. Power Connectors, 105310-xx06, 3 Pins per row (https://www.molex.com/pdm_docs/sd/430450221_sd.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py 64-Lead Plastic Thin Quad Flatpack No-Lead Package, Body 3.0x3.0x0.8mm, Texas Instruments DSBGA BGA YZP R-XBGA-N8 Texas Instruments, DSBGA, 1.36x1.86mm, 12 bump 4x3 grid, NSMD pad definition Appendix A BGA 484 1 FG484 FGG484 Artix-7 BGA, 16x16 grid, 17x17mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=301, NSMD pad definition Appendix A BGA 1156 1 FF1156 FFG1156 FFV1156 Virtex-7 BGA, 44x44 grid, 45x45mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=301, NSMD pad definition Appendix A BGA 484 0.8 SBG485 SBV485 LFCSP, exposed pad, thermal vias, http://www.ti.com/lit/ds/symlink/drv8870.pdf 20-Pin Thermally Enhanced Thin Shrink Small Outline (SSO/Stretched SO), see https://docs.broadcom.com/cs/Satellite?blobcol=urldata&blobheader=application%2Fpdf&blobheadername1=Content-Disposition&blobheadername2=Content-Type&blobheadername3=MDT-Type&blobheadervalue1=attachment%3Bfilename%3DIPD-Selection-Guide_AV00-0254EN_030617.pdf&blobheadervalue2=application%2Fx-download&blobheadervalue3=abinary%253B%2Bcharset%253DUTF-8&blobkey=id&blobnocache=true&blobtable=MungoBlobs&blobwhere=1430884105675&ssbinary=true 6-pin plasic small outline package; 16 leads; body width.
- Vertex -3.465548e+000 6.113461e+000 1.747200e+001 facet normal.
- 4.721622e+000 2.496000e+001 vertex 5.649070e+000 4.246676e+000 9.983999e+000.