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LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= T1 3.200mm 0.1260.

• Normal -0.956945 0.288313 0.0336363.
• 0.296642 0.135306 0.945355 facet normal -0.184686.
• Copyright (c) 2012 Péter Surányi. Portions Copyright.
• (https://katalog.we-online.de/em/datasheet/9774080482.pdf), generated with kicad-footprint-generator Molex Panelmate.

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