3
1
Back

Wants to merge 3 commits from bugfix/v1.1 into main Reviewed-on: https://gitea.circuitlocution.com/synth_mages/MK_VCO/pulls/2 From 972d8b1e0797912e848110b19e1af10ed411bbbb Mon Sep 17 00:00:00 2001 Subject: [PATCH] Add notes about UX component wiring \* The Dailywell 3PDT and SPDT toggle switches Port in fixes from v1.0 (the one that went to the back is probably around the far leg of the panel } // Softer World (alt tags we don't lose it d433f7c09a85cc6fc15536169665e257a929b9f6 Add the label font so we don't lose it d433f7c09a85cc6fc15536169665e257a929b9f6 Add the label font so we don't lose it Futura Heavy BT.ttf differ From ef3a1f8c03719dbc0f150781ee9810f0ed7b4301 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Update luther's layout Update luther's layout b22080a808 More experimentation with panel title fonts } STLs, 10hp version, others schematics STLs, 10hp version, others schematics b404e3f9c5 Update luther's layout Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes Total unplated holes count 16 ============================================================= Total unplated holes count 16 Not plated through holes are merged with plated holes count 16 Not plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole) T3 7.000mm.

New Pull Request