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144 With STLink ST Morpho Connector 144 STLink AI accelerated MCU with optional wifi, https://dl.sipeed.com/MAIX/HDK/Sipeed-M1&M1W/Specifications AI Kendryte K210 RISC-V Texas Instruments BGA-289, 0.4mm pad, 15x15mm, 289 Ball, 17x17 Layout, 0.8mm Pitch, https://www.infineon.com/cms/en/product/packages/PG-LFBGA/PG-LFBGA-292-11/ LFBGA-100, 10x10 raster, 4.201x4.663mm package, pitch 0.5mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32l152zd.pdf WLCSP-64, 8x8 raster, 4.466x4.395mm package, pitch 0.8mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32l152zc.pdf WLCSP-64, 8x8 raster, 4.539x4.911mm package, pitch 0.8mm; see section 7.2 of http://www.st.com/resource/en/datasheet/stm32f378vc.pdf WLCSP-72, 9x9 raster, 3.693x3.815mm package, pitch 0.4mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32f207vg.pdf WLCSP-66, 8x9 raster, 3.767x4.229mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/DM00257211.pdf WLCSP-49, 7x7 raster, 3.141x3.127mm package, pitch 0.65mm UFBGA-32, 6x6, 4x4mm package, pitch 0.5mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32f302vc.pdf WLCSP-100, 10x10 raster, 10x10mm package, 0.5mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=267, NSMD pad definition Appendix A BGA 1156 1 FF1156 FFG1156 FFV1156 Virtex-7 BGA, 34x34 grid, 35x35mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=269, NSMD pad definition (http://www.ti.com/lit/ds/symlink/msp430f2234.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf Texas Instruments, DSBGA, area grid, YBJ0008 pad definition, 0.95x1.488mm, 6 Ball, 2x3 Layout, 0.5mm Pitch, 0.3mm Ball, http://www.st.com/resource/en/datasheet/stm32l486qg.pdf UFBGA-144, 12x12 raster, 10x10mm package, 0.5mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=267, NSMD pad definition, 1.468x0.705mm, 8 Ball, 2x4 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g071eb.pdf ST WLCSP-36, ST die ID 469, 4.02x4.27mm, 81 Ball, 9x9 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32u575og.pdf#page=306 ST WLCSP-100, ST die ID 482, 4.2x3.95mm, 90 Ball, X-staggered 18x10 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32l412t8.pdf ST WLCSP-49, ST die ID 480, 4.57x4.37mm, 132 Ball, 12x11 Layout, 0.35mm Pitch, http://www.latticesemi.com/view_document?document_id=213 Analog Devices (http://www.analog.com/media/en/technical-documentation/data-sheets/ADL5542.pdf LFCSP 8pin thermal pad HTSSOP32: plastic thin shrink small outline package; 14 leads; body width 3.9 mm; lead pitch 0.635; (see NXP sot054_po.pdf to-92 sc-43 sc-43a sot54 PA33 diode SOD70 2-pin TO-92 horizontal, leads in-line, wide, drill 0.75mm (see NXP sot054_po.pdf TO-92 2-pin variant by Heraeus, drill 0.75mm (see NXP sot054_po.pdf TO-92 2-pin variant by Heraeus, drill 0.75mm (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot519-1_po.pdf SSOP16: plastic shrink small outline package; 56 leads (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot510-1_po.pdf TSSOP, 44.

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