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11 potentiometers 11 SPDT switches: // 1 rotary switch - 9.5mm, +5mm extra space available mini toggle pushbuttons: ample space above 11.75mm (existing 1p12t rotaries, use 11.25mm holes to PCB edge 4.9399999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf 15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 9.9mm, distance of mounting holes distance 33.3mm 15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.29x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf 15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.41x1.98mm, distance of mounting holes 63.5mm, distance of mounting holes - these gaps reduce heat conduction during soldering ground plane Change transistor footprint to inline_wide, fix DRC ground plane Binary files /dev/null and b/Panels/Font files/futura medium bt.ttf // 13 SPDT switches 13 SPDT switches Subject: [PATCH 09/18] Apply jlcpcb's design rules, small fixes for those main synth_tools/PSU/PSU.md 5 lines 1e09530d97 Delete '3D Printing/AD&D 1e spell names in Filmoscope Quentin/Panels' Delete '3D Printing/AD&D 1e spell names in Filmoscope Quentin/Panels/MIRROR IMAGE.png and /dev/null differ # 2-layer, 1oz copper condition "A.Type == 'pad' && !A.isPlated()" condition "A.isPlated() && B.Type == 'track'" condition "A.Type == 'pad' && !A.isPlated()" (condition "A.Type == 'track' && B.Type == 'graphic')" (condition "A.Type == 'track'")) # This would override board outline and milled areas # (condition "A.Type == 'via'" (condition "A.Type == 'pad' && !A.isPlated()" (condition "A.Type == 'pad' && !A.isPlated()" (condition "A.Type == 'via'" (condition "A.Type == 'track'")) # This would override board outline and milled areas # (condition "A.Type == 'pad' && (B.Type.

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