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Hard sync to schematic, laid out PCB with exploratory 8hp layout Schematics/Enlarge/Enlarge.kicad_prl | 77 Schematics/Enlarge/Enlarge.kicad_pro | 475 create mode 100644 Hardware/Panel/precadsr_panel_al/precadsr_panel_al.pretty/precadsr-panel-holes.kicad_mod delete mode 100644 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-drl_map.pdf.

• Package width=3.0mm, 3 pins THT.
• -4.955415e-001 -8.671978e-001 4.905849e-002 vertex -4.981148e-003 5.757380e+000 -1.681500e-003.

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