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(http://www.ti.com/lit/ds/symlink/tps5430.pdf Texas Instruments EUW 7 Pin (https://b2b-api.panasonic.eu/file_stream/pids/fileversion/2787), generated with kicad-footprint-generator ipc_gullwing_generator.py SOIC, 8 Pin (https://ww2.minicircuits.com/case_style/XX211.pdf), generated with kicad-footprint-generator Hirose FH12, FFC/FPC connector, FH12-40S-0.5SH, 40 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py TQFP, 48 Pin (https://www.jedec.org/standards-documents/docs/mo-142-d variation DC), generated with kicad-footprint-generator ipc_noLead_generator.py QFN, 28 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-9505-AT42-QTouch-BSW-AT42QT1060_Datasheet.pdf#page=28), generated with kicad-footprint-generator ipc_noLead_generator.py DC6 Package; 6-Lead Plastic DFN (3mm x 3mm) (see Linear Technology 05081955_0_DHC18.pdf DHD Package; 16-Lead Plastic TSSOP (4.4mm); Exposed Pad (see Microchip Packaging Specification 00000049BS.pdf, http://www.onsemi.com/pub/Collateral/NCP1207B.PDF 8-Lead Plastic Dual Flat, No Lead Package (8E) - 4x4x0.9 mm Body [SOIC], pin 7 8-lead though-hole mounted DIP.

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