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S08B-J21DK-GGXR (http://www.jst-mfg.com/product/pdf/eng/eJFA-J2000.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py WSON-10 package 2x3mm body, pitch 0.5mm UFBGA-64, 8x8 raster, 5x5mm package, pitch 0.6mm; http://ww1.microchip.com/downloads/en/DeviceDoc/39969b.pdf Zynq-7000 BGA, 34x34 grid, 35x35mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=278, https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=92, NSMD pad definition, 0.95x1.488mm, 6 Ball, 2x3 Layout, 0.4mm Pitch, https://pdfserv.maximintegrated.com/package_dwgs/21-100168.PDF XBGA-121, 11x11 raster, 10x10mm package, pitch 0.5mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32l152ze.pdf WLCSP-143, 11x13 raster, 4.539x5.849mm package, pitch 0.35mm; see section 7.5 of http://www.st.com/resource/en/datasheet/DM00340475.pdf WLCSP-66, 9x9 raster, 3.639x3.971mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32l152zc.pdf UFBGA 132 Pins, 0.5mm Pitch, DSC0010J, WSON, http://www.ti.com/lit/ds/symlink/tps61201.pdf Plastic Small outline http://www.ti.com/lit/ml/mpds158c/mpds158c.pdf VSO40: plastic very small outline package; 28 leads; body width 3 mm; (see NXP sot054_po.pdf TO-92 horizontal, leads molded, narrow, drill 0.75mm, hand-soldering variant with enlarged pads (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot370-1_po.pdf SSOP56: plastic shrink small outline package; 16 leads; body width 7.5 mm; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot556-1_po.pdf 24-Lead Plastic QFN (3mm x 3mm); Pitch 0.4mm; EP 1.7x1.54mm; for InvenSense motion sensors; keepout area marked (Package see: https://store.invensense.com/datasheets/invensense/MPU-6050_DataSheet_V3%204.pdf; See also https://www.invensense.com/wp-content/uploads/2015/02/InvenSense-MEMS-Handling.pdf 24-Lead Plastic DFN (5mm x 3mm) (see Linear Technology 05081707_A_DHD16.pdf DH Package; 16-Lead Plastic DFN (5.55mm x 5.2mm), Pin 5-8 connected to trigger, gate jack is normalized\nto +12 V, 10 mA -12 V ## Photos [to be added] ## Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf) * [BOM](Docs/precadsr_bom.md) * [Build notes](Docs/build.md) How to use 7.5mm holes, not 6mm - alpha pots - 9.8mm, +2mm - rotary - 11.5mm, +3.5mm -- biggest by far, maybe 12.6mm? SR2511 series are 11.43? Maybe more? Distance between pcb and front panel, vertical.

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