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Back5cacbfea2e523d618ea3bcbc0bca9c37eb36f10d Mon Sep 17 00:00:00 2001 Subject: [PATCH] Update Schematics/schematic_bugs_v1.md more fixes a5c5ff12ce18fecaaf346f973863d12bf361ac82 Notes from debugging Clock POT is too small for a little bit of margin footprint_depth = 1; top_margin = (board_height - hole_vdist) / 2; standoff_radius = hole_radius * 2.5; Latest commits for file Images/PXL_20210831_000922493.jpg 4579d541a8 Adding SynthMages footprint library merged pull request synth_mages/MK_VCO#2 21e2abea62 Merge pull request synth_mages/MK_VCO#5 Add jlc constraints DRC; replace order number text Fireball/Fireball_panel.kicad_pcb | 3 | AudioJack2 | Audio Jack, 2 Poles (Mono / TS) | | C13 | 3 | A1M | Potentiometer | | J2 | 1 | SW_SPDT | SPDT miniature toggle switch ON-ON | | C1, C11 | 2 | 10k | Resistor | | | Q1, Q2, Q3, Q4, Q5 | 5 | 2N3904 | 0.2A Ic, 40V Vce, Small Signal NPN Transistor, TO-92"/>