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File Schematics/SynthMages.pretty/C_Rect_L22.0mm_W6.1mm_P20mm_MKT_BIG_RED_CAP.kicad_mod (grid_origin -1.27 106.172 (grid_origin 121.92 119.38 "Notes": "Layer B.Paste" "Notes": "Layer F.SilkS" "Notes": "Layer F.Mask" "Notes": "Layer F.Mask" "Notes": "Layer F.SilkS" "Notes": "Layer B.Cu" "Notes": "Layer B.Paste" "Notes": "Layer F.Mask" "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer F.Mask" "Notes": "Layer B.Paste" "Notes": "Layer F.Paste" "Notes": "Layer F.Mask" "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer B.Mask" "Notes": "Layer B.Mask" "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer F.SilkS" "Notes": "Layer B.SilkS" ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes count 16 Latest commits for file Panels/title_test_18.stl 0 0 Y N 1 F N DEF LM3900N U 0 5 Y Y 1 F N DEF SW_Push_Dual SW 0 0 PCM_kikit NPTH 0 0 Y N 1 F N DEF power_GND #PWR 0 0 Y N 1 F N DEF Vactrol U 0 5 Y Y 1 F N DEF SW_DIP_x07 SW 0 20 Y N 1 F N DEF SW_Rotary12 SW 0 20 Y Y 1 F N DEF SW_Push_DPDT SW 0 40 0.0 0 LTYPE 5 15 330 5 100 AcDbSymbolTableRecord 100 AcDbLinetypeTableRecord 2 BYLAYER 70 0 3 vertex -6.35807 -6.35807 3 vertex 6.36396 -6.36396 3.82299 facet normal -0.480608 0.871278 0.0994478 facet normal -0.737294 -0.221424 -0.638255 facet normal 0.539147 -0.334152 0.773086 vertex 6.79329 -0.261859 7.03804 facet normal 0.615693 -0.525853 0.586857 facet normal -0.175921 -0.796859 0.577986 facet normal -0.0983934 -0.0148295 -0.995037 vertex -9.29244 -3.68165.

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