10k NTC Thermistor Update luther's layout # Using the Precision ADSR with modifications This is a little bit of margin // margins from edges h_margin = hole_dist_side*4; v_margin = hole_dist_top*2; width_mm = 70.8; // 14HP×5.08mm = 71.12; ES for 14HP is 70.8 first_row = 25.65; //mm second_row = 47.25; //mm third_row = 65.75; //mm fourth_row = 88.25; //mm fifth_row = 108.75; //mm // Center adjust to fit two mounting posts into hole_top = out_row_1 + 94; // this is good practice, but ho-dang what a mess From 7022ad9ddb43c592e11528a5ae21edf443c088e4 Mon Sep 17 00:00:00 2001 Subject: [PATCH] rm old format files 4 files changed, 37 deletions(- delete mode 160000 rename from 3D Printing/6u_wing_v1.scad rename to 3D Printing/Cases/6u_wing_v1.scad 3D Printing/Rails/18hp_innie.stl create mode 100644 Schematics/SynthMages.pretty/3.5mm_jack_hole_nonpcb.kicad_mod create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/C_Rect_L7.2mm_W2.5mm_P5.00mm_FKS2_FKP2_MKS2_MKP2.kicad_mod create mode 100644 Schematics/Enlarge/Enlarge.kicad_prl create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/DIP-16_W7.62mm_Socket_LongPads.kicad_mod create mode 100644 Hardware/PCB/precadsr/precadsr.sch create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/PinHeader_1x04_P2.54mm_Vertical.kicad_mod delete mode 160000 rename from Futura Heavy BT.ttf => Panels/Futura Heavy BT.ttf From 51a08380a94a002bd27260320b805b082bdb3963 Mon Sep 17 00:00:00 2001 eb8580ef62 Undo converting GND to GND_JMP and fix everything that broke Finished PCB, passes all passable DRCs Footprint selection, some PCB layout choices .../Unseen Servant/Unseen Servant.kicad_sch Normal file View File 3D Printing/Pot_Knobs/Pot3.STL Executable file View File 3D Printing/Cases/Eurorack Modular Case/DSC03778.JPG Executable file View File Schematics/Luthers_VCO_schematic.pdf Normal file Unescape Hardware/PCB/precadsr/Kosmo_panel.pretty/fastestenv_Panel_Dual_Slotted_Mounting_Hole.kicad_mod Normal file Unescape \+12V, -12V and ground needed, probably up to 1amp - maybe not as efficient as a full bridge rectifier; could use fewer caps that way main MK_SEQ/Panels/10_step_seq.scad 387 lines // CV.