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File version 1) #Kicad 7 # 2-layer, 1oz copper condition "A.Type == 'via' && B.Type == 'track'" ; DRILL file {KiCad 5.1.10-88a1d61d58~90~ubuntu20.04.1} date Sat Aug 7 13:40:31 2021 ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= 77735c00cc3285131373f5cfc61b82eab5963d12 Update README.md 5505000471ab249f70d985a8f814bce077fb47b2 Update README.md f0ccd475bcae4d90f684767b57611a775351886d Update README.md 3e868f13c4dc33c20ca33a0cc8f51c9d63e1c081 updated C14 footprint, traces, groundplane updated C14 footprint, traces, groundplane updated C5 footprint & tracing; schematic annotation 6523065365 updates the potentiometer shaft clf_shaft_notch_diameter = 5.0; // the D shape "removed" from the other leg of the indenting cones. ≥30 means "round, using current quality setting". Shafthole_faces = 20; // some potentiometers need.

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