3
1
Back

1.144433e+01 facet normal 0.767777 -0.634425 0.0895734 facet normal 2.498284e-001 4.371998e-001 8.639688e-001 facet normal -2.096583e-001 -3.669017e-001 9.063259e-001 vertex 1.698597e+000 4.963580e+000 2.491820e+001 facet normal 2.335446e-15 -6.180379e-16 -1.000000e+00 facet normal -0.225389 0.184972 0.956549 facet normal 0.976244 -0.096218 0.194139 facet normal -0.643673 -0.528246 0.553752 facet normal 0.0464246 0.0868544 0.995139 vertex 7.20038 -2.98249 5.97318 facet normal 8.706301e-01 -4.919382e-01 3.074473e-04 vertex -9.122290e+01 9.519027e+01 4.255000e+01 facet normal 0 0.833884 0.55194 Latest commits for file Panels/label_test.stl From f5fc556ca298718ed9c38de316ac4c166fbbe181 Mon Sep 17 00:00:00 2001 Images/capsocket.png | Bin 0 -> 43300 bytes Panels/FireballSpell_Large_bw.xcf | Bin 0 -> 16561 bytes 3D Printing/Rails/36hp_outie.stl | Bin 0 -> 317907 bytes Images/PXL_20210831_004139245.jpg | Bin 0 -> 578884 bytes .../Panels/Radio_shaek_standoff_thick.stl | Bin 11930 -> 0 bytes Latest commits for file Fireball/Fireball.kicad_sch Added input resistor for sync; placed everything on PCB with on-board components Add correct footprints to fireball Add correct footprints to fireball Add correct footprints to fireball 3c7abf2196 Move LED resistors next to transistors to save on panel wires Move LED resistors checkpoint after roughing out middle PCB checkpoint after roughing out middle PCB checkpoint after roughing out middle PCB Binary files /dev/null and b/Panels/luther_triangle_vco_quentin_v3_only_art.stl differ Binary files a/3D Printing/Panels/image.png and /dev/null differ From ebf8c2dd8791c613d66d2effb885955ef88e075e Mon Sep 17 00:00:00 2001 Subject: [PATCH] learns about gitignore and git rm --cache 713014315986726ad96f361cfbc8e67551a6a879 power word stun initial commit by 269f3bf9f9109b69cf4264b79cb1ed6f6a114782 footprint "3.5mm_jack_hole_nonpcb" (version 20221018) (generator pcbnew Latest commits for file.

New Pull Request