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3.939388e-03 -9.991600e-01 vertex -1.066064e+02 9.725134e+01 1.291646e+01 facet normal 0.741147 0.224825 0.632577 facet normal 0.0816193 -0.828696 0.553715 facet normal 1.119201e-15 -4.948430e-15 1.000000e+00 facet normal -0.84015 0.533181 0.0993242 facet normal -0.956432 -0.291712 -0.0119451 vertex 2.84428 0.565762 19 facet normal 0.703593 0.707111 0.0703601 facet normal 0.844291 0.451284 0.288991 vertex -6.34429 6.34429 4.79464 facet normal 1.594894e-001 -2.746963e-001 9.482115e-001 facet normal 0.29034 0.956924 -9.5392e-07 facet normal 9.162096e-001 -4.006992e-001 0.000000e+000 vertex -2.407443e+000 -6.689721e+000 2.496000e+001 vertex 1.828861e+000 5.328399e+000 1.747200e+001 facet normal -1.279777e-001 -2.250130e-001 9.659145e-001 vertex -8.161444e-001 -5.644413e+000 2.495526e+001 facet normal -8.724433e-001 -3.885432e-003 4.887000e-001 vertex 4.067735e+000 -1.520985e-002 2.480400e+001 facet normal -0.242747 0.97009 0 vertex 5.96308 8.22545 2.19603 facet normal -0.714673 -0.538408 0.446497 vertex 0.72986 -6.63594 7.5439 facet normal -0.0868544 0.0464246 0.995139 vertex -7.34655 -1.56356 6.0001 facet normal -2.880153e-004 -5.040268e-004 -9.999998e-001 ## Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf * [How to use](Docs/use.md 96f746fa2d Final tweaks, version submitted to JLCPCB on 20240124 Final tweaks, version submitted to JLCPCB on 20240124 Final tweaks, version submitted to JLCPCB on 20240124 3d279dd88c Finish schematic, add PDF Features already done: - Internal clock with manual control. Clock in socket with 80 contacts AT ISA 16 bits Bus Edge Connector Mini-PCI Express bus connector (https://s3.amazonaws.com/fit-iot/download/facet-cards/documents/PCI_Express_miniCard_Electromechanical_specs_rev1.2.pdf#page=11 Mini-PCI Express bus.

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