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From 5ff3077e8252367b7eceb0b21b0803904b695d42 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Updated LICD, alter alt-textify to handle weaker (<6v) signals - Clock rate goes down when resistance goes up, opposite to expectation. C1 is too small for a resistor as well Once/Cont When in Cont mode shorts Casc Out - 1K to U2-14 - Casc out 2x Toggle Switches, 3pin: - CV Range - Once/Cont 11 Toggle Switches, 2pin: all step switches (all go to same bus) .

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