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Date Sat Aug 7 13:39:59 2021 ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes count 16 Not plated through holes are merged with plated holes count 0 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CmtUser.gbr Normal file Unescape Hardware/PCB/precadsr/ao_tht.pretty/DIN5.kicad_mod Normal file Unescape Schematics/Enlarge/Enlarge.kicad_sch Normal file Unescape Hardware/PCB/precadsr_aux_Gerbers/precadsr-PTH.drl Normal file Unescape top_margin = (board_height - hole_vdist) / 2; hole_margin = 1; // [0:Flat, 1:Recessed, 2:Dome] // Do you want to add glide db7d02719b Find and replace last few thin traces, fix teardrops and gnd fill Embiggen traces, add teardrops.

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