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In .../Panels/BLADE BARRIER.png | Bin 0 -> 138868 bytes Docs/precadsr_bom.md | 71 Docs/precadsr_layout_back.pdf | Bin 0 -> 36336 bytes create mode 100644 Fireball/Fireball.kicad_sch Update Fab Plant Research Table of Contents Wizard / Illusionist Spells Cleric Druid Ideas for 1e and/or Holmesian Basic spell names in Filmoscope Quentin/Panels/FIREBALL VCO.png' 68726f9fe0 Delete '3D Printing/AD&D 1e spell names in Filmoscope Quentin/Panels/COLOR SPRAY.png' Delete '3D Printing/Panels/FIREBALL VCO.png' # precadsr.sch BOM Documentation, some cosmetic sh/PCB updates Docs/precadsr.pdf | Bin 69096 -> 77965 bytes 3D Printing/Panels/image.png | Bin 0 -> 11930 bytes 3D Printing/Panels/FIREBALL VCO.png differ Binary files /dev/null and b/3D Printing/Panels/AD&D 1e spell names in Filmoscope Quentin/Panels/POLYMORPH.png and /dev/null differ attr (teardrop (type padvia min_thickness 0.0254) (filled_areas_thickness no Binary files /dev/null and b/Schematics/Fireball_VCO.pdf differ b11a8d3187 Go to file db7d02719b Find and replace last few thin traces, fix teardrops and gnd fill Embiggen traces, add teardrops 46614f2341 Add 55k-ish resistor to coarse knob to fix tuning range pushed tag v1 to synth_mages/MK_SEQ released Prototype Version 1.0 at synth_mages/MK_SEQ pushed tag v1.0 to synth_mages/MK_VCO Latest commits for file Panels/luther_triangle_vco_quentin_v4.scad Replaced accidentally dropped Fine tuning hole. 52b504dd7c Delete 'Panels/futura medium condensed bt.ttf' ## Current draw ### Current draw 12 mA +12 V, and sustain voltage is taken from \npot pin 1 x 1 mm, 734-174 , 14 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator ipc_noLead_generator.py Texas WSON-6 DQK, http://www.ti.com/lit/ds/symlink/csd16301q2.pdf Texas DRC0010J, VSON10 3x3mm Body, 0.5mm Pitch, http://www.ti.com/lit/ds/symlink/ts3a24159.pdf Texas Instruments, BGA Microstar Junior, 5x5mm, 80 ball 9x9 grid, NSMD pad definition Appendix A Zynq-7000 BGA, 22x22 grid, 23x23mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=277, https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=296, https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=91, NSMD pad definition Appendix A BGA 484 1 FG484 FGG484 Artix-7 BGA, 22x22 grid, 19x19mm package, 0.8mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=263, NSMD pad definition Appendix A BGA 484 0.8 SB484 SBG484 SBV484 Zynq-7000 BGA, 30x30 grid, 31x31mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=306, NSMD pad definition Appendix A BGA 484 0.8 SBG485 SBV485 LFCSP, exposed pad, thermal vias, http://www.ti.com/lit/ds/symlink/drv8870.pdf 20-Pin Thermally Enhanced Thin Shrink Small-Outline Package, Body 4.4x6.5x1.1mm, Pad 3.0x4.2mm, Texas Instruments DSBGA BGA Texas Instruments, DSBGA, 0.9x1.4mm, 6 bump 2x3 (perimeter) array, NSMD pad definition Appendix A BGA 484 1 FG484 FGG484 Artix-7 BGA, 22x22 grid, 23x23mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=269, NSMD pad definition Appendix A BGA 484 0.8 RS484 Artix-7.

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