3
1
Back

VQ, 24 pin, exposed pad: 4.5x8.1mm, with thermal pad with vias HTSSOP, 20 Pin (JEDEC MS-013AD, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_wide-rw/RI_20_1.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py QFN, 16 Pin (https://www.ti.com/lit/ml/msop002a/msop002a.pdf), generated with kicad-footprint-generator Molex KK 396 Interconnect System, old/engineering part number: 26-60-5180, 18 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py LGA, 14 Pin.

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