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BackHttp://www.ti.com/lit/ds/symlink/ts3a24159.pdf Texas Instruments, DSBGA, area grid, YZF, YZF0016, 2.39x2.39mm, 16 Ball, 4x4 Layout, 0.5mm Pitch, S-PVSON-N10, DRC, http://www.ti.com/lit/ds/symlink/tps61201.pdf 3x3mm Body, 0.5mm Pitch, https://ww1.microchip.com/downloads/en/DeviceDoc/16B_WLCSP_CS_C04-06036c.pdf WLCSP-20, 4x5 raster, 1.934x2.434mm package, pitch 0.8mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32f446ze.pdf WLCSP-81, 9x9 raster, 3.693x3.815mm package, pitch 0.65mm UFBGA-32, 6x6, 4x4mm package, pitch 0.65mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f410t8.pdf WLCSP-49, 7x7 raster, 3.294x3.258mm package, pitch 0.5mm; see section 7.7 of http://www.st.com/resource/en/datasheet/DM00330506.pdf WLCSP-100, 10x10 raster, 9x9mm package, pitch 0.8mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32l152zc.pdf WLCSP-64, 8x8 raster, 3.357x3.657mm package, pitch 0.35mm; https://datasheets.maximintegrated.com/en/ds/MAX40200.pdf WLP-9, 1.448x1.468mm, 9 Ball, 3x3 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g071eb.pdf ST WLCSP-36, ST die ID 483, 3.73x4.15mm, 115 Ball, X-staggered 21x11 Layout, 0.4mm Pitch, YFF0006, NSMD pad definition Appendix A Virtex-7 BGA, 42x42 grid, 42.5x42.5mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=265, NSMD pad definition (http://www.ti.com/lit/ds/symlink/txs0104e.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf Texas Instruments, DSBGA, 0.9x1.9mm, 8 bump 3x3 (perimeter) array, NSMD pad definition Appendix A BGA 1156 1 FF1157 FFG1157 FFV1157 FF1158 FFG1158 FFV1158 Virtex-7 BGA, 44x44 grid, 45x45mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=298, https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=94, NSMD pad definition Appendix A Kintex-7 BGA, 26x26 grid, 27x27mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=271, ttps://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=281, https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=82, NSMD pad definition Appendix A Virtex-7 BGA, 42x42 grid, 42.5x42.5mm package.
- C58f541d7e93b3fa0676ab29736db865cc42ef96 Mon Sep 17 00:00:00 2001 Subject.
- V_margin+12; // draw panel.
- 0.435818 0.815358 0.381123 vertex.
- | D3, D4, D5, D6, D7, D8, D9.
- (see Texas Instruments DSBGA BGA YZP.