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Request proposed by 1 user #7 Cumulative fixes from v1.1 Checkpoint after tweaking footprints some more, starting over at 14hp PCB initial layout, no traces "min_copper_edge_clearance": 0.0, PCB initial layout, no traces Initial kicad, images, gitignore for kicad backups.

2.751463e-001 facet normal -0.094243 -0.0285882.
0.891007 0.45399 0 facet normal 0.331516 -0.422844 0.843386.
0.618852 -0.265169 0.739397 facet normal 0.0731598.
HLE-127-02-xxx-DV-BE-A, 27 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf.
TTT167 (https://ww2.minicircuits.com/case_style/TTT167.pdf Footprint for Mini-Circuits case.

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