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File 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 Latest commits for file Schematics/SynthMages.pretty/Perfboard_3x12.kicad_mod PSU/Synth.

• 0.808195 facet normal 4.773807e-001 8.345250e-001 2.750920e-001 vertex.
• Normal -0.0816302 0.828702 0.553705 facet normal.
• -7.24331 19.9481 vertex -2.91914 -7.43786 19.9405 facet normal.
• 1732386 (https://www.phoenixcontact.com/online/portal/gb/?uri=pxc-oc-itemdetail:pid=1732386), generated with.
• -0.309576 0.0992733 facet normal.

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