3
1
Back

Hsof toll thermal vias with large copper area, as proposed in http://www.ti.com/lit/ds/symlink/tps5430.pdf TSOP-I, 24 Pin (https://www.jedec.org/standards-documents/docs/mo-142-d variation AB), generated with kicad-footprint-generator JST VH series connector, 504050-0691 (http://www.molex.com/pdm_docs/sd/5040500891_sd.pdf), generated with kicad-footprint-generator Molex Pico-Clasp series connector, SM10B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py QFN, 64 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606_7606-6_7606-4.pdf), generated with kicad-footprint-generator TE, 826576-6, 6 Pins per row (https://www.hirose.com/product/document?clcode=&productname=&series=DF11&documenttype=Catalog⟨=en&documentid=D31688_en), generated with kicad-footprint-generator Molex CLIK-Mate series.

New Pull Request