Labels Milestones
BackFor precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) T5 15.200mm 0.5984" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes T5 15.200mm 0.5984" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole Total plated holes count 16 ============================================================= Total unplated holes count 16 ============================================================= Total unplated holes count 0 Minor layout tweaks Minor layout tweaks Schematics/Fireball_VCO.pdf | Bin 0 -> 70584 bytes 3D Printing/Panels/MAGIC MISSILE VCF.png | Bin 13962 -> 6771 bytes c852e5d6ad Go to file b11a8d3187 Change transistor footprint to inline_wide.
- Of incidental or consequential damages.
- Component | Description | Manufacturer.
- Inductor https://www.bourns.com/docs/Product-Datasheets/SRN1060.pdf Bourns SRN1060.