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Panels/FireballSpellSmall.png Executable file View File Thu 22 Apr 2021 10:45:56 AM EDT Mon 10 May 2021 12:33:34 AM EDT Mon 10 May 2021 12:33:34 AM EDT Sat 28 Aug 2021 07:18:14 PM EDT Hardware/PCB/precadsr/Kosmo_panel.pretty/fastestenv_Jack_Hole.kicad_mod Normal file Unescape Schematics/SynthMages.pretty/SOCKET_3_PIN_HEADER_NORMAL.kicad_mod Normal file Unescape Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 Copper Layer Stackup: T5 15.200mm 0.5984" (1 hole Total plated holes count 16 Not plated through holes are merged with plated holes count 16 Not plated through holes are merged with plated holes Total unplated holes count 16 Not plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole Total plated holes unplated through holes: ============================================================= 2cddc4d62d38c9e1b69839f92a19e7915eecbceb 2dd0b8c0c736720a0b064bbe1304dc9562beb260 Latest commits for branch bugfix/v1.1 Add position for resistor between coarse and +12V, value unknown 5a4e89eea63bf71c8fd68e1168f096dfb3459aa4 More cleanup Schematics/Fireball.kicad_sch | 400 (50 "User.1" user (51 "User.2" user (52 "User.3" user (53 "User.4" user (54 "User.5" user (55 "User.6" user (56 "User.7" user (57 "User.8" user (58 "User.9" user Component Count: 76 Refs C2, C5, C6, C8 | 4 .../PCB/precadsr_Gerbers/precadsr-F_Paste.gbr | 15 .../precadsr_Gerbers/precadsr-Edge_Cuts.gbr | 34 .../PCB/precadsr_Gerbers/precadsr-F_Mask.gbr | 4 | 1M | Resistor .

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