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Cb59d1e9c06865f5bebe8c7ee0afa4859e0766b2 Mon Sep 17 00:00:00 2001 Images/capsocket.png | Bin 0 -> 43300 bytes Panels/FireballSpell_Large_bw.xcf | Bin 0 -> 292501 bytes create mode 100755 MK_VCO_RADIO_SHAEK_W_PARTS.diy create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/Potentiometer_Alpha_RD901F-40-00D_Single_Vertical_CircularHoles_centered.kicad_mod delete mode 100644 (0 F.Cu signal hide (33 F.Adhes user (34 B.Paste user (35 F.Paste user (36 B.SilkS user (37 F.SilkS user hide (0 "F.Cu" signal (31 B.Cu signal hide (31 B.Cu signal (32 "B.Adhes" user "B.Adhesive" (33 "F.Adhes" user "F.Adhesive" (34 "B.Paste" user (35 "F.Paste" user (36 B.SilkS user (37 F.SilkS user hide 42 Eco1.User user hide (42 Eco1.User user hide From 5a4d5850276107dae545a96ba13aec19af1bdbba Mon Sep 17 00:00:00 2001 Subject: [PATCH] PCB initial layout, no traces Using the Precision ADSR with retriggering and looping modifications title("FIREBALL", size=12, font=font_for_title); 2c2abd8837 checkpoint before getting really weird with WireIt A couple more minor clearance tweaks Add ground fills, fix some clearance issues, make all power traces large Added input resistor for sync; placed everything on PCB Fireball/Fireball.kicad_sch | 1614 main MK_SEQ/Schematics/Unseen Servant/Unseen Servant.kicad_prl | 2 Fireball/Fireball.kicad_prl | 4 Fireball/Fireball_panel.kicad_dru | 102 Fireball/Fireball.kicad_pro | 19 .../SolderWirePad_1x01_Drill1mm.kicad_mod | 19 .../SolderWirePad_1x01_Drill1mm.kicad_mod | 19 }, From 7022ad9ddb43c592e11528a5ae21edf443c088e4 Mon Sep 17 00:00:00 2001 Subject: [PATCH] A couple more GND-stitch vias Undo converting GND to GND_JMP and fix everything that broke 3583986e89 Finished PCB, passes all passable DRCs Show-stopping bugs needing bodges: Errant connection between R25 and R1. This needs to be.

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