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Back[ 0,0,h0], [ ord*cos(lf0), ord*sin(lf0), h2], [ ord*cos(lf2), ord*sin(lf2), h0], [ ird*cos(lf0), ird*sin(lf0), h1], [ 0,0,h2], Created on Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) Total plated holes count 16 Latest commits for file Images/loop.png d8deca9307 Delete '3D Printing/Panels/FIREBALL VCO.png' # precadsr.sch BOM Sat 28 Aug 2021 07:18:14 PM EDT Kassu used 1 uF | Unpolarized capacitor | | Tayda | A-559 | | | | | R1, R2 | 2 | 10k | Resistor | | Tayda | A-2939 | | | Tayda | A-826 | | | | | | J3 | 1 | TL074 | Quad operational amplifier, DIP-14