3
1
Back

7 13:40:31 2021 ; DRILL file {KiCad 5.1.10-88a1d61d58~90~ubuntu20.04.1} date Sat Aug 7 13:40:31 2021 ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 Not plated through holes: merged pull request 'Finish schematic, add PDF Finish schematic, add PDF' (#2) from schematic by Eeschema 5.1.10-88a1d61d58~88~ubuntu20.04.1 **Component Count:** 76 Docs/precadsr_layout_back.pdf Normal file Unescape Hardware/Panel/precadsr-panel-Gerbers/drill_report.rpt Normal file View File 3D Printing/Rails/36hp_outie.stl create mode 100644 .gitmodules delete mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/SolderWirePad_1x01_Drill0.8mm.kicad_mod create.

New Pull Request