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Back100644 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-MaskTop.gts create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/analogoutput_12mm.kicad_mod create mode 100644 3D Printing/Pot_Knobs/repere_v3.stl Normal file View File # For PCBs designed using KiCad: https://www.kicad.org/ # Format documentation: http://kicad-pcb.org/help/file-formats/ # Temporary files *.lck # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 ============================================================= Total unplated holes count 0 Minor layout tweaks Schematics/Fireball_VCO.pdf | Bin 0 -> 170624 bytes README.md | 5 | 2N3904 | Small Signal NPN Transistor, TO-92"/>
- Img 2015-07-08 21:01:00 -07:00 From 2eebdf7ecf422fd634dd8afc69d23956ae0ebfdc Mon.
- 4.97411 -4.13072 7.83604 facet normal 2.890015e-001.
- 106.357184 (end 178.35 116.75 (end.