synth_tools

Back

676484 bytes 3D Printing/Panels/HOLD PORTAL.png | Bin 0 -> 110393 bytes Images/PXL_20210831_000949090.jpg | Bin 0 -> 12724 bytes .../Panels/POLYMORPH.png | Bin 0 -> 580484 bytes .../Panels/Radio_shaek_standoff_padded.stl | Bin 684 -> 1394884 bytes Panels/title_test_18.stl | Bin 0 -> 23847 bytes Panels/FireballSpell_Large.webp | Bin 0 -> 5613178 bytes create mode 100644 3D Printing/Panels/FIREBALL VCO.png | Bin 0 -> 12724 bytes .../Panels/POLYMORPH.png | Bin 0 -> 11692 bytes .../Panels/HOLD PORTAL.png | Bin rename Futura Heavy BT.ttf → Panels/Futura Heavy BT.ttf From f80e4975fbba2affa8a7d947f9ed8429315837d4 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Schematic updates main synth_tools/Schematics/SynthMages.pretty/Perfboard_3x12.kicad_mod 80 lines Add radio shaek with cv2 version From a295bd71525185b616796bece6c52d455905c9b6 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Assorted updates 9060b76361734f9abf9a1c676dd9110e9ced917b initial kicad project main MK_SEQ/.gitignore 3 lines Schematics/Luthers_Perfboard.pdf Normal file View File Panels/futura light bt.ttf Normal file Unescape Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-SilkTop.gto Normal file View File 3D Printing/Cases/Eurorack 2-Row/212d78eb7158bfb85110e9b580cff116_preview_featured.jpg Executable file View File MK_VCO_RADIO_SHAEK.diy Executable file View File 3D Printing/AD&D 1e spell names in Filmoscope Quentin/Panels/FIREBALL VCO.png' Delete '3D Printing/AD&D 1e spell names in Filmoscope Quentin' d8a7439c05979d3c73da6a91162e90a1a48a57e5 Upload files to '3D Printing/AD&D 1e spell names rendered as raster using Filmoscope Quentin Normal file Unescape Hardware/Panel/precadsr_panel.png Normal file View File Schematics/Unseen Servant/fp-info-cache Normal file Unescape Hardware/Panel/precadsr-panel/sym-lib-table Normal file Unescape Fireball/Fireball.kicad_prl Normal file View File 3D Printing/Cases/Eurorack 2-Row/rail.stl Executable file Unescape Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes count 16 Not plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) T5 15.200mm 0.5984" (1 hole) Total plated holes unplated through holes: ============================================================= 77735c00cc3285131373f5cfc61b82eab5963d12 4675f71e05fc19d3608ee6e5061bbe79ae432fb7 c4e1c30b9b Add jlc constraints DRC; replace order number text Things best left to external modules: CV-controlled CV offset module - add a global/master pitch control/modulation function with a knob and with CV control of pitch and FM modulation, hard sync, and pulse wave width, and PWM level. Unseen Servant functions fd8b2dd8a7c07368476bde4f42aea6df4bff239b tracks the ratsnest and compactifies the power safety block and into any non-high-impedence connections; that is, fat traces to chip power, but not that small - C7 is a ceramic.

New Pull Request

Labels Milestones