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Cleanup, adopt github .gitignore file 33729ec97f6dd2ed68c4ca06088ce0b21651948d Align panel to integer pseudo-origin, remove testing text, decrease title label font size to 9mm and align it precisely for repeatability b11a8d31874f2e074879a668b4f6eb5f32915bd6 Change transistor footprint to inline_wide, fix DRC ground plane Change transistor footprint to inline_wide, fix DRC ground plane Updates from real TL0x4, fix pots being backwards, tighten up schematic, fit letter instead of A4 c852e5d6ad8630143a633f6c4ffcb4d705a43337 Add note resulting from real TL0x4s Merge pull request synth_mages/MK_VCO#5 Add jlc constraints DRC; replace order number text Fireball/Fireball_panel.kicad_pcb | 3 | 4.7k | Resistor | | | | | AR Path="/607F01E7" Ref="R?" Part="1" AR Path="/607ED812/60A9C088" Ref="R30" Part="1" AR Path="/607ED812/60A9C0A9" Ref="R11" Part="1" AR Path="/60A9C096" Ref="R?" Part="1" AR Path="/607ED812/60A9C096" Ref="R24" Part="1" AR Path="/607ED812/60C38349" Ref="R10" Part="1" AR Path="/60802B98" Ref="R?" Part="1" AR Path="/60A9C0A9" Ref="R?" Part="1" AR Path="/607ED812/60802BB2" Ref="R31" Part="1" AR Path="/607ED812/609384DB" Ref="#FLG0102" Part="1" AR Path="/607ED812/60C3833D" Ref="R21" Part="1" AR Path="/60802BB2" Ref="R?" Part="1" AR Path="/607ED812/60A9C088" Ref="R14" Part="1" AR Path="/607ED812/60970E37" Ref="S1" Part="1" AR Path="/607ED812/60802BB2" Ref="R31" Part="1" AR Path="/607ED812/60B16110" Ref="J11" Part="1" AR Path="/60800A40" Ref="R?" Part="1" AR Path="/60800A40" Ref="R?" Part="1" AR Path="/607ED812/60A9C081" Ref="R13" Part="1" AR Path="/607ED812/60A9C088" Ref="R14" Part="1" AR Path="/607ED812/60B160FF" Ref="J10" Part="1" AR Path="/607ED812/609384DB" Ref="#FLG03" Part="1" AR Path="/607ED812/6091D1B4" Ref="S2" Part="1" AR Path="/60802B98" Ref="R?" Part="1" AR Path="/607ED812/60B160FF" Ref="J7" Part="1" AR Path="/607ED812/60C38349" Ref="R10" Part="1" AR Path="/60C38343" Ref="R?" Part="1" AR Path="/607ED812/60C38349" Ref="R10" Part="1.

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