synth_tools

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7.79364 5.97318 facet normal -0.773356 -0.633859 -0.0119696 facet normal 0.284755 -0.938725 0.194192 vertex -9.34401 -3.87041 2.58057 facet normal 0.714676 0.586516 0.3811 facet normal -3.267702e-001 -5.718465e-001 7.524711e-001 facet normal -9.513645e-01 -3.080676e-01 -1.010354e-05 facet normal -0.55213 0.109736 -0.826505 vertex 2.84551 -0.566007 18.8953 vertex -0.4 3.34544 12.85 vertex -1 6.92882 7.8933 vertex 1 6.92771 7.89317 vertex 1 6.419 12.8511 vertex 1 6.38819 12.8541 vertex 1 6.419 12.8511 vertex 1 6.36215 13.3567 vertex -1 3.18579 20.5 vertex 0.95 6.11494 21.5472 vertex 0.95 5.48429 22.5 vertex -0.95 5.48429 22.5 vertex 0.95 0 20.5 vertex 1 0 PCM_kikit Tab A symbol representing annotation for tab placement (condition "A.Type == 'via'" condition "A.Type == 'track'")) # This would override board outline and milled areas # (condition "A.Type == 'via' && B.Type == 'track'" ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 Not plated through holes are merged with plated holes count 16 Not plated through holes are merged with plated holes count 16 Not plated through holes: unplated through holes: unplated through holes: unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes count 16 ============================================================= Total unplated holes count 16 Not plated through holes are merged with plated holes Total unplated holes count 16 Not plated through holes are merged with plated holes unplated through holes: merged pull request 'new_footprints' (#5) from new_footprints into main.

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