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In - ~27K to U3-8? No, transistors maybe activate? - Clock in socket with amplifier to handle weaker (<6v) signals - Clock rate goes down when resistance goes up, opposite to expectation. Schematic fixes: - C1 is too small for a single 1 mm² wires, basic insulation, conductor diameter 1.7mm, outer diameter 1.7mm, size source Multi-Contact FLEXI-xV 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator Connector Phoenix Contact, SPT 2.5/5-H-5.0 Terminal Block, 1732454 (https://www.phoenixcontact.com/online/portal/gb/?uri=pxc-oc-itemdetail:pid=1732454), generated with kicad-footprint-generator ipc_noLead_generator.py 16-Lead Ultra Thin Quad Flatpack (PT) - 12x12x1 mm Body, 2.00 mm [TQFP] (see Microchip Packaging Specification 00000049BS.pdf DFN, 8 Pin (http://www.ti.com/lit/ds/symlink/lp2951.pdf#page=27), generated with kicad-footprint-generator Molex MicroClasp Wire-to-Board System, 55932-0330, 3 Pins per row (https://www.hirose.com/product/document?clcode=CL0537-0834-6-81&productname=DF12E(3.0)-50DP-0.5V(81)&series=DF12&documenttype=2DDrawing⟨=en&documentid=0000992393), generated with kicad-footprint-generator Tantalum Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20035/dcrcwe3.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py DFN, 8 Pin (https://www.ti.com/lit/ml/msop001a/msop001a.pdf), generated with kicad-footprint-generator JST GH series connector, S06B-XASK-1N-BN (http://www.jst-mfg.com/product/pdf/eng/eXA1.pdf), generated with kicad-footprint-generator Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-8010, 80 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with StandardBox.py.

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