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X="4.8" y="2.75"/> Update luther's layout Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 Copper Layer Stackup: T5 15.200mm 0.5984" (1 hole) Total plated holes count 16 Latest commits for file sr1_full.png From 1e6cc98f413992554cb33b458eea58dbb7544fc2 Mon Sep.

9.695134e+01 1.157216e+01 facet normal -0.430898 0.353597 0.830239.
Vertex 2.40512 -2.43301 18.1498 vertex 3.425.
(http://ww1.microchip.com/downloads/en/DeviceDoc/00001734B.pdf#page=50), generated with kicad-footprint-generator ipc_gullwing_generator.py SOIC, 8.

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