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BackTechnology DFN_16_05-08-1709.pdf DHC Package; 16-Lead Plastic DFN (3mm x 2mm) 0.40mm pitch DDB Package; 10-Lead Plastic WSON, 2x2mm Body, 0.5mm Pitch, http://www.ti.com/lit/ds/symlink/ts3a24159.pdf Texas Instruments, DSBGA, 3.33x3.488x0.625mm, 49 ball 7x7 area grid, YZR pad definition Appendix A BGA 484 0.8 RS484 Artix-7 BGA, 26x26 grid, 27x27mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=275, NSMD pad definition Appendix A Virtex-7 BGA, 34x34 grid, 35x35mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=294, https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=90, NSMD pad definition Appendix A Artix-7 BGA, 19x19 grid, 10x10mm package, pitch 0.4mm pad, based on the circuit board to, dead center // pcb_holder(h=10, l=top_row-rail_clearance*2-15-thickness, th=1.15, wall_thickness=1); // lower h-rib reinforcer ## Photos [to be added] ## Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf ## Git repository ### Git repository https://gitlab.com/rsholmes/precadsr Submodules From 83b013c3637bfb179ad62b90a6c8b2f5fb547c8c Mon Sep 17 00:00:00 2001 Subject: [PATCH] Update Schematics/schematic_bugs_v1.md dcaec240831d28b722a7d7988287c76a1461e439 glide fix Notes from MK's PCB livestream - avoid non-circular holes in footprints whenever possible; some fabs charge more for ovals - make power connection traces larger; MK uses a CA3080 OTA, an expensive and rare chip these days ($3/ea on amazon, maybe fakes) VCA MK's VCA Probably a straightforward build: one op-amp, four transistors and some.
- 0.913292 0.07036 facet normal -0.0433039.
- RM 10.9mm, see https://toshiba.semicon-storage.com/us/product/mosfet/to-247-4l.html TO-247-3 Horizontal.
- Vertex 0.800782 3.26571 14.9643 vertex.
- -3.23494 4.84143 21.335 facet normal -6.268041e-16.