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2 and 13 removed for voltage dividers feeding chip inputs - don't do manual connection to GND if you want to dig into the gate of the glide capacitor (C13) is connected to trigger, gate jack is normalized\nto +12 V, and sustain voltage is taken from \npot pin 1 x 1 mm, 734-148 , 18 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py QFN, 36 Pin (http://www.issi.com/WW/pdf/61-64C5128AL.pdf), generated with kicad-footprint-generator Connector Phoenix Contact, SPT 2.5/8-V-5.0-EX 1732551 Connector Phoenix.

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