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File Panels/FireballSpellSmall.png Executable file View File # For PCBs designed using KiCad: https://www.kicad.org/ # Format documentation: http://kicad-pcb.org/help/file-formats/ # KiCad backups folders Hardware/PCB/precadsr/precadsr.kicad_pro Normal file Unescape Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CuBottom.gbl Normal file View File 3D Printing/Cases/Eurorack Modular Case/EuroRack_Case_24.png Executable file View File 398c2b234c Checkpoint after fixes but before shrinking boards 007cc05932dfa23f85127799f5505afc7b25772e Stuff all teh scad files in Still trying to implement chaining Checkpoint before trying to implement chaining Schematics/Unseen Servant/Unseen Servant.kicad_pcb | 4 .../precadsr_aux_Gerbers/precadsr-NPTH.drl | 4 .../PCB/precadsr_aux_Gerbers/precadsr-PTH.drl | 22 .../precadsr_aux_Gerbers/precadsr-job.gbrjob | 128 .../precadsr_aux_Gerbers/precadsr-B_Mask.gbr | 266 .../precadsr_aux_Gerbers/precadsr-B_Paste.gbr | 4 Fireball/Fireball_panel.kicad_dru | 102 Fireball/Fireball_panel.kicad_prl | 2 | 47k | Resistor | | R1, R10, R11 | 3 From 2118197c1e2cab02a4a0c4b6381e9d7946ff4f12 Mon Sep 17 00:00:00 2001 Subject: [PATCH 03/18] tweaks layout with input from sam Latest commits for file Datasheets/BC546A-MCC.pdf Fireball/fp-info-cache Normal file Unescape Hardware/PCB/precadsr/potsetc.sch Normal file View File Panels/FireballSpell_Large_bw.png.svg Normal file Unescape Schematics/SynthMages.pretty/IDC-Header_2x05_P2.54mm_Vertical_Fixed_Ground_Fill.kicad_mod Normal file Unescape Fireball/Fireball.kicad_prl Normal file View File 3D Printing/Panels/AD&D 1e spell names in Filmoscope Quentin' Latest commits for file Schematics/SynthMages.pretty/Perfboard_1x12.kicad_mod # Temporary files *.lck # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= 4675f71e05fc19d3608ee6e5061bbe79ae432fb7 panel(width); // lower h-rib reinforcer ## Photos [to be added] ## Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf) * [BOM](Docs/precadsr_bom.md) * [Build notes](Docs/build.md) How to use Images/adsr.png | Bin 0 -> 38764 bytes Panels/futura medium bt.ttf | Bin 0 -> 92229 bytes Panels/FireballSpellSmall.png | Bin 0 -> 136810 bytes Images/captest.png | Bin 0 -> 38860 bytes Panels/Font files/futura light bt.ttf | Bin 0 -> 292501 bytes create mode 100644 Synth_Manuals/LABOR_MANUAL.pdf create mode 100644 Hardware/PCB/precadsr/Kosmo_panel.pretty/fastestenv_Panel_Mounting_Hole.kicad_mod create mode 100644 Hardware/PCB/precadsr_aux_Gerbers/precadsr-F_Paste.gbr create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/Potentiometer_Bourns_3296W_Vertical.kicad_mod delete mode 100644 Synth_Manuals/Module Summaries.ods Normal.

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