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BackVertex 7.3758 -1.46714 6.0001 facet normal -7.873540e-01 -1.326791e-03 6.164997e-01 facet normal -4.575367e-001 7.823349e-001 4.226254e-001 vertex 4.345719e+000 -3.381239e+000 2.480400e+001 facet normal 0.0222079 -0.0969559 0.995041 vertex -3.02394 7.70489 19.9688 facet normal 6.020419e-002 1.068593e-001 9.924498e-001 vertex -4.239579e+000 -2.515929e+000 2.496000e+001 facet normal 0.338927 0.181147 0.923209 facet normal 7.417835e-07 -1.000000e+00 -5.217529e-07 facet normal 0.308982 -0.0243228 0.950757 facet normal 0.479376 -0.871973 0.0993049 facet normal -6.202536e-01 -4.499466e-03 -7.843885e-01 vertex -1.083218e+02 9.695134e+01 1.047195e+01 facet normal -7.775532e-01 -6.288171e-01 -3.274316e-04 vertex -9.191964e+01 1.035781e+02 2.550000e+00 facet normal 0.18114 -0.338909 0.923217 vertex 7.60195 -5.07946 3.76384 vertex 6.50317 -6.85323 3.54602 facet normal -2.880153e-004 -5.040268e-004 -9.999998e-001 ## Documentation: ### Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf * [How to use](Docs/use.md 96f746fa2d Final tweaks, version submitted to JLCPCB on 20240124 3d279dd88c Finish schematic, add PDF | J6 | 1 nF | Unpolarized capacitor | | | | | | R14 | 1 | 1 | Synth_power_2x5 | 2x5 pin shrouded header 2.54 mm spacing | | | | | J10 | 1 | TL074 | Quad Low-Noise JFET-Input Operational Amplifiers, DIP-8/SOIC-8/TSSOP-8/VSSOP-8