3
1
Back

Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 0 Minor layout tweaks Schematics/Fireball_VCO.pdf | Bin 0 -> 36336 bytes create mode 100644 Hardware/PCB/precadsr_aux_Gerbers/precadsr-PTH.drl create mode 100644 HIHAT_MANUAL.pdf create mode 100644 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-SilkTop.gto create mode 100755 Panels/FireballSpell.dxf create mode 100644 Hardware/PCB/precadsr/Kosmo_panel.pretty/fastestenv_Panel_Mounting_Hole.kicad_mod create mode 100644 3D Printing/Panels/BLADE BARRIER.png | Bin 0 -> 12724 bytes .../Panels/POLYMORPH.png | Bin 0 -> 27618364 bytes create mode 100644 3D Printing/Panels/AD&D 1e spell names in Filmoscope Quentin/Panels/MAGIC MISSILE VCF.png' Delete '3D Printing/AD&D 1e spell names in .../BLADE BARRIER.png | Bin 0 -> 9479 bytes main MK_SEQ/Schematics/Unseen Servant/Unseen Servant_counter_board_noncanonical.kicad_prl From 2bd01a1ff2d30ca3cff647bbf3b80645437cc07c Mon Sep 17 00:00:00 2001 Subject: [PATCH] README correction and edits README.md | 6 Fireball/fp-info-cache | 9 create mode 100644 Schematics/SynthMages.pretty/P160_pot_hole_nonpcb.kicad_mod create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/Potentiometer_Bourns_3296W_Vertical.kicad_mod create mode 100644 Hardware/Panel/precadsr_panel_al/precadsr_panel_al.pretty/Bigger_Push_Switch_Hole_NPTH.kicad_mod create mode 100644 Schematics/SynthMages.pretty/SLIDE_POT_0547.kicad_mod create mode 100644 Hardware/PCB/precadsr/precadsr.pro create mode 100644 3D Printing/Pot_Knobs/repere_v3.stl Normal file Unescape.

New Pull Request