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System, 55935-1430, 14 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator ipc_noLead_generator.py QFN, 24 Pin (http://www.ti.com/lit/ds/symlink/msp430fr5720.pdf#page=108), generated with kicad-footprint-generator ipc_gullwing_generator.py Infineon PG-DSO 12 pin, exposed pad, thermal vias, http://www.ti.com/lit/ds/symlink/drv8870.pdf 20-Pin Thermally Enhanced Thin Shrink Small Outline (SN) - Narrow, 3.90 mm Body [DFN] (http://www.onsemi.com/pub/Collateral/NCP4308-D.PDF DD Package; 12-Lead Plastic DFN (2mm x 2mm) (see Linear Technology DFN_18_05-08-1778.pdf DFN20, 6x5, 0.5P; CASE 505AB (see ON Semiconductor 932BB.PDF 144-Lead Plastic Thin Quad Flatpack (PT) - 7x7x1.0 mm Body [SOIC], see https://www.mouser.com/ds/2/328/linkswitch-pl_family_datasheet-12517.pdf eSOP-12B SMT Flat Package with Heatsink Tab, see https://ac-dc.power.com/sites/default/files/product-docs/topswitch-jx_family_datasheet.pdf Power Integrations eDIP-12B, see https://www.power.com/sites/default/files/product-docs/linkswitch-pl_family_datasheet.pdf 4-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils 4-lead surface-mounted (SMD) DIP package.

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