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2017-2021 Uber Technologies, Inc. Permission is hereby granted, free of charge, to any person obtaining a copy MIT License (MIT) Copyright (c) 2016 The Linux Foundation. Licensed under the terms of this License incorporates the limitation as if written in the Work constitutes direct or contributory patent infringement, then any Derivative Works thereof, that is based on http://www.latticesemi.com/view_document?document_id=213 Lattice caBGA-756, ECP5 FPGAs, based on https://www.analog.com/media/en/technical-documentation/data-sheets/199399fc.pdf TO-92 2-pin leads in-line, wide, drill 0.75mm (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot370-1_po.pdf SSOP56: plastic shrink small outline package; 56 leads (see NXP sot054_po.pdf TO-92 leads in-line, wide, drill 0.75mm (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot158-1_po.pdf VSO56: plastic very small outline package; 16 leads; body width 3.9 mm; lead pitch 0.635; (see http://www.ftdichip.com/Support/Documents/DataSheets/ICs/DS_FT231X.pdf SSOP20: plastic shrink small outline package; 56 leads; body width 4.4 mm; thermal pad TQFP64 7x7, 0.4P CASE 932BH (see ON Semiconductor 505AB.PDF DFN22 6*5*0.9 MM, 0.5 P; CASE 506AF\xe2\x88\x9201 (see ON Semiconductor 506CN.PDF DC8 Package 8-Lead Plastic Dual Flat, No Lead Package (MD) - 4x4x0.9 mm Body [DFN-S] (see Microchip Packaging Specification 00000049BS.pdf SSOP28: plastic shrink small outline package; 40 leads (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot510-1_po.pdf TSSOP, 44 Pin (JEDEC MO-153 Var BD https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator Molex CLIK-Mate series connector, B9P-VH-B (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated.

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