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BackHref="https://gitea.circuitlocution.com/synth_mages/MK_SEQ/commit/a5c5ff12ce18fecaaf346f973863d12bf361ac82">a5c5ff12ce18fecaaf346f973863d12bf361ac82 Notes from debugging Do not assume anything works!** Latest commits for file Panels/dual_vca.scad T5 15.200mm 0.5984" (1 hole) Total plated holes Total unplated holes count 16 ============================================================= Total unplated holes count 16 ============================================================= Total unplated holes count 16 ============================================================= Total unplated holes count 16 Not plated through holes: ============================================================= 2dd0b8c0c736720a0b064bbe1304dc9562beb260 init e49f4ab127dc081ee1c77dd21e80d128628a1152 5ff3077e8252367b7eceb0b21b0803904b695d42 Fix sr2 blue Fix sr2 blue Samurai formatting caixa bits f51b7b97734e404127fa5d5d263acbfd66f116e4 Bring in diylc and openscad design main MK_SEQ/Schematics/Unseen Servant/Unseen Servant.kicad_pro | 2 create mode 100644 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-SilkBottom.gbo create mode 100644 Hardware/Panel/precadsr_panel.png create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/PinHeader_1x08_P2.54mm_Vertical.kicad_mod delete mode 100644 Hardware/PCB/precadsr/potsetc.kicad_sch delete mode 100644 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-PasteBottom.gbp create mode 100644 Hardware/PCB/precadsr/precadsr.net delete mode 100644 .gitmodules delete mode 100644 3D Printing/Rails/18hp_outie.stl | Bin 0 -> 292501 bytes create mode 100644 Hardware/Panel/precadsr-panel/precadsr-panel-cache.lib create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/Potentiometer_Alpha_RD901F-40-00D_Single_Vertical_CircularHoles_centered.kicad_mod delete mode 100644 Schematics/SynthMages.pretty/Jack_3.5mm_QingPu_WQP-PJ398SM_Vertical_CircularHoles_Socket_Centered.kicad_mod create mode 100644 Synth_Manuals/Module Summaries.ods