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100644 .gitignore create mode 100644 Images/precadsr-panel-art.png create mode 100644 Hardware/PCB/precadsr/Kosmo_panel.pretty/Kosmo_Trimmer_Pot_Hole.kicad_mod delete mode 100644 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-EdgeCuts.gm1 create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/Potentiometer_Bourns_3296W_Vertical.kicad_mod create mode 100644 Hardware/Panel/precadsr-panel/precadsr-panel.pretty/precadsr-panel-art.kicad_mod create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/Molex_KK-254_AE-6410-03A_1x03_P2.54mm_Vertical.kicad_mod create mode 100644 3D Printing/Rails/36hp_outie.stl | Bin 0 -> 407684 bytes Panels/luther_triangle_vco_quentin_v2.scad | 18 .../precadsr-panel-art.kicad_mod | 958 .../precadsr-panel-holes.kicad_mod | 208 .../precadsr_panel_al/precadsr_panel_al.pro | 30 .../precadsr_panel_al/precadsr_panel_al.sch | 264 .../Panel/precadsr_panel_al/sym-lib-table | 4 Binary files /dev/null and b/Hardware/Panel/precadsr_panel.png differ Cell (black box KASSU / AO Grid is metric (mm), left edge centeris at (50,150). Notey increases upward here but downward in KiCad. Pot (9 / 16 mm 3.5 mm jack 3 mm LED Binary files /dev/null and b/Panels/futura light bt.ttf and /dev/null differ 4049c4aafe Delete '3D Printing/AD&D 1e spell names in Filmoscope Quentin/COLOR SPRAY.png differ Binary files /dev/null and b/Panels/Font files/futura light bt.ttf create mode 100644 Hardware/PCB/precadsr/Kosmo_panel.pretty/fastestenv_Panel_Dual_Mounting_Holes.kicad_mod create mode 100644 Fireball/Fireball.kicad_pro create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/PinHeader_1x08_P2.54mm_Vertical.kicad_mod create mode 100644 Hardware/PCB/precadsr/ao_symbols.lib delete mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/analogoutput_12mm.kicad_mod create mode 100644 Images/IMG_6770.JPG create mode 100644 Hardware/Panel/precadsr_panel.png create mode 100644 Panels/Font files/futura medium bt.ttf differ Binary files /dev/null and b/Images/befaco_vcadsr.png differ master PSU/Synth Mages Power Word Stun.kicad_pro 555 lines }, "silk_line_width": 0.15, PCB initial layout, no traces PCB initial layout, no traces }, Add ground fills, fix some clearance issues.

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