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Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= From a22bca6d29ddc0a54597dab4d11ad9ab7e48e3c6 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Notes about component heights, swapping rotary and toggle switches smt_version Merge pull request 'Fix rail clearance issues, make all power traces large "rules": { PCB initial layout, no traces "silk_text_size_h": 1.0, "silk_text_size_v": 1.0, PCB initial layout, no traces "silk_text_size_h": 1.0, "silk_text_size_v": 1.0, "silk_text_thickness": 0.15, "silk_text_upright": false, "zones": { "min_clearance": 0.5 } }, updates to rev 2 beta README.md | 3 | AudioJack2 | Audio Jack, 2 Poles (Mono / TS) | | U1 | 1 | B20k | Potentiometer | | | R16, R17, R19, R20 | 4 .../Panel/precadsr-panel/precadsr-panel.pro | 30 .../precadsr_panel_al/precadsr_panel_al.sch | 194 .../precadsr_panel_al-B_SilkS.gbr | 472 .../precadsr_panel_al-Edge_Cuts.gbr | 26 .../precadsr-panel-MaskBottom.gbs | 75 Panels/FireballSpell_Large_bw.png.svg | 57 create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/3PDT-toggle-switch-1M-seriesx.kicad_mod create mode 100755 Panels/FireballSpell_Large.webp create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/Potentiometer_Bourns_3296W_Vertical.kicad_mod delete mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/C_Disc_D3.0mm_W1.6mm_P2.50mm.kicad_mod delete mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/C_Rect_L7.2mm_W2.5mm_P5.00mm_FKS2_FKP2_MKS2_MKP2.kicad_mod delete mode 100644 Panels/FireballSpellVertSmall.png create mode 100644 Hardware/Panel/precadsr-panel/precadsr-panel-rescue.kicad_sym delete mode 100644 Hardware/PCB/precadsr/Kosmo_panel.pretty/Kosmo_LED_Hole.kicad_mod create mode 100644 Images/PXL_20210831_000949090.jpg.

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