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Broke Finished PCB, passes all passable DRCs created pull request 'new_footprints' (#5) from new_footprints into main Reviewed-on: https://gitea.circuitlocution.com/synth_mages/MK_VCO/pulls/4 Put title box in PDF export Merge pull request 'new_footprints' (#5) from new_footprints into main afea9d5a2c Final revision; added custom DRC as project file c4e1c30b9b Add jlc constraints DRC.

Normal 0.0974275 -0.989344 0.108195.
And hold each Contributor harmless.

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