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B.SilkS" ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged.

• 8.577476e-001 3.438094e-003 5.140595e-001 facet normal.
• Normal -6.968273e-001 -7.172390e-001 0.000000e+000 vertex 3.660537e+000 -6.112594e+000.

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