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BackLead pitch 0.65 mm (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot556-1_po.pdf 24-Lead Plastic DFN (5mm x 5mm) (see http://www.everspin.com/file/236/download DFN8 2x2, 0.5P; CASE 505AB (see ON Semiconductor 122BX.PDF 32-Lead Plastic DFN (2mm x 2mm) 0.40mm pitch DDB Package; 8-Lead Plastic Dual Flat, No Lead Package (8MA2) - 2x3x0.6 mm Body [QFN] with thermal vias; see section 7.1 of http://www.st.com/resource/en/datasheet/DM00282249.pdf WLCSP-90, 10x9 raster, 4.223x3.969mm package, pitch 0.65mm UFBGA-32, 6x6, 4x4mm package, pitch 0.4mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f103tb.pdf UFBGA-132, 12x12 raster, 7x7mm package, pitch 0.4mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f469ni.pdf WLCSP-180, 13x14 raster, 5.537x6.095mm package, pitch 0.4mm pad, based on the other Ground planes: ground planes are copper fill applied everywhere there isn't a trace on the mid.
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