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0.0426235 0.554793 0.830896 vertex -7.3432 -0.499373 6.98393 vertex 7.31983 0.636408 7.07423 facet normal -9.204106e-01 -3.909530e-01 -3.122985e-04 vertex -1.039237e+02 9.590616e+01 2.550000e+00 facet normal -2.880153e-004 -5.040268e-004 -9.999998e-001 ## Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf * [How to use](Docs/use.md 96f746fa2d Final tweaks, version submitted to JLCPCB on 20240124 63579cf959 Add notes about UX component wiring 55ee65a5e9 Checkpoint after converting most things to SMD Binary files /dev/null and b/Synth_Manuals/LABOR_MANUAL.pdf differ Binary files /dev/null and b/Panels/FIREBALL VCO.png differ Binary files /dev/null and b/Images/PXL_20210831_000949090.jpg differ Binary files /dev/null and.

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