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"error", "similar_labels": "warning", More tweaks after pro review "multiple_net_names": "warning", "net_not_bus_member": "warning", "no_connect_connected": "warning", "no_connect_dangling": "warning", "pin_not_connected": "error", "pin_not_driven": "error", "pin_to_pin": "warning", "power_pin_not_driven": "error", "similar_labels": "warning", More tweaks after pro review "design_settings": { "defaults": { PCB initial layout, no traces Fireball/Fireball.kicad_prl | 8 "use_height_for_length_calcs": true From 01bb4964a63ffeda0774c500204d2687e8f4164c Mon Sep 17 00:00:00 2001 Subject: [PATCH] Notes from debugging Clock POT is too small for a 1uF capacitor; expand a bit, but also size it for a particular Contributor are reinstated on.

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