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Footprints to fireball Merge pull request 'new_footprints' (#5) from new_footprints into main afea9d5a2c Final revision; added custom DRC as project file Add jlc constraints DRC; replace order number text Compare 19 commits » 33729ec97f More repo cleanup, adopt github .gitignore file .gitattributes | 2 create mode 100644 Hardware/Panel/precadsr_panel_al_Gerbers/precadsr_panel_al-F_Cu.gbr create mode 100644 Docs/precadsr_layout_back.pdf (grid_origin 97.28 88.9 Mon 10 May 2021 12:33:34 AM EDT Sat 28 Aug 2021 07:48:29 PM EDT Thu 22 Apr 2021 10:45:56 AM EDT Generated from schematic by Eeschema 5.1.10-88a1d61d58~88~ubuntu20.04.1 Generated from schematic by Eeschema 5.1.10-88a1d61d58~88~ubuntu20.04.1 **Component Count:** 76 | Refs | Qty | Component | Description | Manufacturer | Part | Vendor | SKU | | | | R16, R18, R26 | 3 | 2_pin_Molex_header | 2 | 10uF | Electrolytic capacitor | | | | | S1 | 1 | B20k | Potentiometer | | | Tayda | A-1157 or A-2425 | | D1, D2, D3, D4, D5, D6, D7, D8, D9, D10 | 8 | 1N4148 | 100V 0.15A standard switching diode, DO-35 | | | | | | | | Tayda | A-826 | | C7, C12 | 1 | Conn_01x02 | SIP socket, 2.54 mm, 1x4 | | | J2 | 1 C10, C14 too small for film; is film needed? More notes move bugs to md file to be +1mm between.

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